We are building the compute layer that lets AI run on data it is never allowed to see.
VaultBytes is early-stage and moving fast. We work on FHE chips, oracle-free conformance standards, and encrypted LLM inference — problems that combine lattice cryptography, hardware design, and systems engineering in ways that have no established playbook. If that is the kind of work you want to do, we want to hear from you.
Three interlocking technologies that do not exist at production quality anywhere. We are building all three.
A hardware accelerator for the CKKS key-switch — the computational bottleneck in encrypted transformer inference. Three compute engines (key-switch, arithmetic, bootstrap) proven bit-exact on real silicon (AWS F2 / Xilinx VU47P). Targeting an HBM3e ASIC as the next milestone.
The industry-first protocol to certify that an FHE chip or cloud engine computes correctly — without decrypting customer data. Two patent-pending tiers: TRACE algebraic fingerprinting and AKAC hardware-rooted attestation. The conformance layer that the industry does not yet have.
An end-to-end FHE stack running transformer inference on ciphertexts. Llama-3.1-8B survives the encryption with less than one MMLU point of accuracy loss — statistically insignificant. The goal is making encrypted inference practical, not just possible.
The deployment of AI in regulated industries — healthcare, finance, defense, government — is structurally blocked by a single constraint: the inference server sees the data. Fully homomorphic encryption removes that constraint at the mathematical level, not by policy or contractual trust. An FHE chip combined with a conformance standard is the infrastructure layer that makes private AI deployable in the places where it is most needed and currently impossible. The lattice mathematics underlying FHE is also the foundation of post-quantum cryptography — this work sits at the intersection of the two most consequential cryptographic developments of the next decade.
We care about depth over breadth, correctness over velocity, and the ability to work independently on problems that are not yet well-posed. We are a small team moving into territory where the map is incomplete.
Lattice cryptography, FHE scheme parameters, NTT implementation, modular arithmetic, CKKS noise analysis. Comfortable with the gap between a paper proof and a working implementation.
RTL design in SystemVerilog or VHDL, AXI4 bus protocols, timing closure, HBM integration. Experience with AWS F2, Xilinx UltraScale+, or TSMC flow a strong plus.
Original work in FHE — scheme design, bootstrapping, approximation analysis, parameter selection, or application to machine learning. Publication record valued but not required.
C++, CUDA, Python. Experience integrating with OpenFHE, Microsoft SEAL, or similar. Ability to write production-quality code in a research-adjacent codebase where the spec evolves.
What matters most: deep ownership, intellectual honesty about what is proven versus assumed, and comfort working at the edge of what is known. We are not building a product on top of established infrastructure — we are building the infrastructure. That requires people who find that kind of uncertainty motivating rather than uncomfortable.
We are an early-stage, founder-led company. We do not hire to fill a headcount plan — we hire when we find someone whose depth of knowledge changes what we can build.
If you are working on FHE, lattice cryptography, secure hardware, or FHE-adjacent systems, and you think there is a fit, reach out below. We read every message and reply to every serious inquiry.
No open role is required. If your work is relevant and serious, tell us about it. A portfolio, GitHub profile, paper preprint, or anything that shows what you have actually built or proved is more useful than a CV.